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CACD Group
updated 2000.05.11

Device Models in SPICE OPUS

  • MOS (M)
    Level Description
    1 MOS1, Meyer capacitance model
    2 MOS2, Meyer capacitance model
    3 MOS3, Meyer capacitance model
    4 BSIM1 Berkeley short channel IGFET model
    5 BSIM2 Berkeley short channel IGFET model
    6 MOS6, Meyer capacitance model
    7 BSIM3 Berkeley short channel IGFET model
    8 BSIM4 Berkeley short channel IGFET model
    9 Berkeley SOI dynamic depletion MOSFET model
    10 Berkeley SOI fully depleted MOSFET model
    11 Berkeley SOI partially depleted MOSFET model
  • JFET (J)
  • Level Description
    1 JFET
    2 Parker-Skellern short channel JFET model
  • MESFET (Z)
  • BJT (Q)
  • Diode (D)
  • Resistor (R)
  • Capacitor (C)
  • Inductor (L)
  • Inductor coupling (K)
  • Voltage controlled switch (S)
  • Current controlled switch (W)
  • Lossless transmission line (T)
  • Lossy transmission line (O)
  • Uniformly distributed RC line (U)
  • VCVS (E)
  • VCCS (G)
  • CCVS (H)
  • CCCS (F)
  • Independent voltage source (V)
  • Independent current source (I)
  • Nonlinear controlled current/voltage source (B)
  • XSPICE code models (A)
    • Poly source - builtin code model, used for simulation of
      simulator-translated polynomial sources (POLY(N)).
    • Code models loaded from .cm library files are described in the XSPICE section of the documentation. Information about model parameters of code models are also in the .ifs files supplied with the .cm library sources. For .cm library source file location in the SPICE OPUS tree see installation instructions.
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