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CACD Group updated 2000.03.30 Author Janez Puhan |
D Flip-flop As A Frequency DividerThe circuitThe D flip-flop, as shown below, is constructed by replacing the gates in the latch flip-flop with cross-coupled NAND gates. D stands for "Delay" and refers to the fact that the binary value at D will be shifted to the output Q by positive clock pulse edge at the input T. When the signal at D is changing, it will be shifted to Q at a subsequent positive clock edge only. Connecting the input D to the inverting output results in a frequency divider commonly known as count-by-two circuit.
The input file
The results
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