library ieee; use ieee.std_logic_arith.all; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity cognome is port( clk,reset,enable : in std_logic; address_in : in unsigned(7 downto 0); command_in : in std_logic_vector(1 downto 0); address_out : out unsigned(7 downto 0); memory_read : out std_logic ); end cognome; architecture STRUCT of cognome is type stato is (idle,single,burst); signal ns,cs : stato; signal addr,naddr : unsigned(7 downto 0); begin process(clk,reset) begin if reset = '0' then cs <= idle; addr <= (others => '1'); else if clk'event and clk='1' then if enable='0' then cs <= ns; addr <= naddr; end if; end if; end if; end process; process(addr,cs,command_in,address_in) begin case cs is when idle => address_out <= (others => '1'); memory_read <='1'; if command_in="01" then naddr <= address_in; else naddr <= addr; end if; if command_in="00" then ns <= idle; elsif command_in="10" then ns <= single; elsif command_in="11" then ns <= burst; else ns <= cs; end if; when single => address_out <= addr; memory_read <='0'; naddr <= addr; ns <= idle; when burst => address_out <= addr; memory_read <='0'; naddr <= addr+1; if command_in="00" then ns <= idle; else ns <= burst; end if; -- In caso di malfunzionamenti il sistema viene riportato -- nello stato idle when others => address_out <= (others => '1'); memory_read <='1'; naddr <= addr; ns <= idle; end case; end process; end STRUCT;