Algorithms and Architectures for Single-Chip Automatic Speech Recognition Systems

This research activity, started in 1994, aims at implementing a highly-portable automatic speech-recognition system. Main features of the system should be very high integration level and very low power consumption. Typical applications are characterized by the need of recognizing simple isolated commands, usually 20-100, pronounced by a single speaker: examples are vocal interfaces for laptop computers, vocal dialing for cellular phones, voice-controlled personal digital assistants.

Nowadays, the best algorithms in terms of recognition rate are based on a structural approach and exploit Hidden Markov Models to model speech dynamics and variability. Unfortunately, high recognition rates correspond to high algorithmic complexity and sensitivity to the precision at which computations are carried out, so that it seems difficult to achieve a single-chip implementation.

Our activity focuses on heavily simplified algorithms based on a pattern-recognition approach; it has been shown that, using a vocabulary of 20 words (the TI20 corpus), the recognition error can be kept about 1\%, which is acceptable in the applications cited above.

Actually, a complete speech recognizer has been devised showing the feasibility of its single-chip implementation. A low-power, low-voltage speech analysis unit has been implemented as a mask-level gate-array which is currently being manufactured.


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