In this paper a silicon compiler for analog fuzzy controllers is described. The layout is generated automatically, starting from global system specifications accepted as a set of classical fuzzy rules involving fuzzy sets as well as numerical data, often available from numerical examples. The system relies on a library of basic cells designed using a CMOS n-well $0.7\mu m$ technology provided by SGS-Thomson and on the use of Cadence software. Fuzzy-logic based controllers are synthesized and the area and power requirements by any specific application optimized. As an example, a fuzzy controller generated according to the proposed methodology and implementing a two inputs, one output rational function requires, including the I/O circuitry, $0.75mm \times 2.11mm$ of silicon area, the total power consumption is $34mW$ at 5V power supply and the maximum simulated propagation delay, assuming a step input function, is $ 0.57 \mu sec$. The total computation time, using a SUN Sparc2 workstation, is about $20 min$ from specification of the expected behavior to layout. Some prototypes designed using the proposed methodology are now in fabrication.

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