A description of the analog circuit for function synthesis based on fuzzy logic is given. A modular architecture has been implemented: it allows to synthesize functions with the desired number of inputs, outputs and rules. A prototype with nine rules, two inputs and one output has been fabricated in a standard CMOS $1.5\mu m$ technology and measurements results are discussed in this paper: the basic module featuring one rule requires a silicon area of $265 \mu m \times 140 \mu m$ and the power consumption is below $350 \mu W$, using a $5V$ power supply. The rules are computed in parallel achieving a maximum measured delay response to a step input function of $600ns$.
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